1. Field of the Invention
This invention relates to the field of voltage level translation circuits and in particular the translation of transistor transistor logic (TTL) signals to complementary metal oxide semiconductor (CMOS) voltage levels.
2. Background Art
It is often desired to provide an interface between CMOS (integrated circuit) devices and TTL circuitry. In providing such an interface, it is necessary to convert the voltage levels of the TTL circutry to levels which may be utilized in the CMOS circuitry.
Previous technology for the interface circuits involved comparator circuits with a reference voltage set for the midpoint of the TTL specification (e.g. 1.3 to 1.4 volts). Other prior art circuitry involved a CMOS inverter stage with transistor sizes selected to optimize the switching threshold near the TTL specification point.
The accuracy of comparator techniques depends upon the accuracy of the reference voltage being used. For example, if a reference voltage is shared among several input buffer circuits, there is a risk of noise coupling on the reference voltage causing interference between inputs. The comparator circuit will consume bias power regardless of the input voltage level, and thus will typically not provide zero power operation for the CMOS to CMOS application. In addition, the comparator circuit is not well suited for high speed operation unless biased at a high power level.
The CMOS inverter circuit is sensitive to process variations as it depends upon the relationship of transistor characteristics between P channel and N channel transistors. The two different devices (P channel and N channel) do not "track" or self compensate in typical wafer fabrication processes. As a result, the switching threshold varies too much to insure proper operation in the typical range of process variations and operating environments.
Further, the size ratio required to shift the inverter threshold from mid power supply down to TTL levels is such that the N channel device dominates the circuit behavior, and any changes in the threshold or conductance of the N channel transistor will shift the switching threshold accordingly.
Therefore, it is an object of the present invention to provide a TTL/CMOS interface circuit which is insensitive to process variations.
It is yet another object of the present invention to provide a TTL/CMOS interface circuit comprised entirely of CMOS components (no diodes or bipolar transistors) which operates at a high rate of speed.